A Sparse-Bayesian Approach for the Design of Robust Digital Predistorters Under Power-Varying Operation

In this article, a sparse-Bayesian treatment is proposed to solve the crucial questions posed by power amplifier (PA) and digital predistorter (DPD) modeling. To learn model, advanced Bayesian framework includes group of specific processes that maximize likelihood measured data: regressor pursuit identification, coefficient estimation, stopping criterion, deselection. The relevance vector machine (RVM) method reformulated theoretically be implemented in complex-valued linear regression. essence, given an initial set candidate regressors, result learning approach most likely model. Experimental results are provided for linearization class AB J PAs driven 30-MHz fifth-generation new radio signal fixed average power, where evolution figures merit versus number active coefficients examined (SBP) algorithm comparison other greedy algorithms. SBP presents good performance terms capabilities computational cost. Furthermore, enabled design DPD model structure, deselect readjust direct architecture, demonstrating robustness changes level over 10-dB range.